Multi-Chip Packages (MCPs)

A multi-chip package, or “system in a package,” (SIP) in combination with BGA technology, is viewed as part of the solution set for the widening gap between silicon I/O density and performance, and the material capabilities of the board or interposer.

A multi-chip package can be viewed as a standard single-chip package modified to accommodate the multiple ICs and passive components that provide the user with much higher functionality and integration. Most custom multi-chip packages typically incorporate 2 to 6 die and are packaged in conventional ball grid array (BGA), PBGA, CBGA, CGA, QFP, PGA or package-on-package. Many of these can be tested to MIL-STD-883 methods.

Some advantages of multi-chip module packaging include:

Ability to achieve greater functionality in a time-to-market window that cannot be met through silicon integration. Increased density and performance and reduced size and weight at the board or system level
Reduced board area and routing complexity at the next level. Often, board layer reduction offsets the additional costs of using multi-chip packages
Design optimization through use of the most cost-effective silicon solutions and assembling different semiconductor technologies, die geometries, or chips from different fabs in the same package
Value added of high-speed designs, improved signal integrity, assembly processes and material set incorporated into the multi-chip package
The ability to incorporate die stacking or multi-level two-sided packages increases density even further
Incorporation of different interconnection technologies; flip-chip or wire bond; or SMT, can be accommodated
Allows the OEM to upgrade products by using die-shrinks in the same package
Can be implemented in PBGA, package-on-package or hermetic packaging
Can include anti-tamper technologies

Learn more about Key Application Benefits of PCB Density & Reduced Routing Complexity .

Microsemi’s Role in the MCP Market

Microsemi Power and Microelectronics Group serves the military-aerospace market with standard and custom defense electronics and multi-chip package solutions.

As a merchant multi-chip package supplier, our company began designing and building MCPs in 1987 and has been on the forefront of the technology ever since. Continued advances in high performance system requirements have created the need for increased integration of high-density electronics. Ruggedized subsystems offering reduced size, lower weight and improved electrical performance are the core of MPMG MCP technology.

Today MPMG has full designs, fabrication and test capabilities for a wide selection of multi-chip package devices. The MPMG product offering includes standard and Commercial Off The Shelf memory MCPs and select processor MCPs for demanding applications. Memory MCPs include SRAM, SDRAM, flash and EEPROM technologies and combinations of these. Custom multi-chip package designs based on customer supplied silicon take advantage of these capabilities as well.

Packages and Materials

Packaging options include standard PBGA, CBGA, fully hermetic ceramic QFP and PGA as well as standard monolithic SOJ, flat pack and DIP.

MPMG uses a variety of interposer materials including alumina ceramic, high-TCE ceramic, laminate and resin technology. These materials are used with chip on board assembly , wire bond and flip chip assembly capability.

Plastic encapsulations for PBGA devices are capable of passing JEDEC standard moisture qualification testing, temp cycling, and HAST.

Engineering and Design

Our engineering team is fluent in all aspects of MCP device design and system performance requirements, including:

Expertise in package construction requirements with regard to size and weight and associated thermal, mechanical and power considerations
Expertise in environmental requirements from commercial testing to full military qualification
Expertise in writing and implementing test software for complex memory and microprocessor circuits
Expertise in system requirements, including memory, processor, coprocessor, cache memory, oscillators, timers, graphics options, interrupts, on-board clocks, and other logic functions
Utilization of leading edge development software for thermal, mechanical and electrical performance and emulation of the package
Utilization of design tools that integrate system-level modeling and simulation and data transfer between chip, package and board design environments
BLR analysis and qualification of MCPs for extended temperature applications